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  ?002 fairchild semiconductor corporation rfg60p03, rfp60p03, RF1S60P03SM rev. b rfg60p03, rfp60p03, RF1S60P03SM 60a, 30v, 0.027 ohm, p-channel power mosfets these p-channel power mosfets are manufactured using the megafet process. this process, which uses feature sizes approaching those of lsi integrated circuits gives optimum utilization of silicon, resulting in outstanding performance. they were designed for use in applications such as switching regulators, switching converters, motor drivers and relay drivers. these transistors can be operated directly from integrated circuits. formerly developmental type ta49045. features 60a, 30v ? ds(on) = 0.027 ? temperature compensating pspice model peak current vs pulse width curve uis rating curve 175 o c operating temperature related literature - tb334 ?uidelines for soldering surface mount components to pc boards symbol packaging ordering information part number package brand rfg60p03 to-247 rfg60p03 rfp60p03 to-220ab rfp60p03 RF1S60P03SM to-263ab f1s60p03 note: when ordering, use the entire part number. add the suf? 9a to obtain the to-263ab variant in tape and reel, i.e. RF1S60P03SM9a. g d s jedec style to-247 jedec to-220ab jedec to-263ab drain (bottom side metal) source drain gate drain (flange) source drain gate drain (flange) gate source data sheet january 2002
?002 fairchild semiconductor corporation rfg60p03, rfp60p03, RF1S60P03SM rev. b absolute maximum ratings t c = 25 o c, unless otherwise speci?d rfg60p03, rfp60p03, rfs60p03sm units drain to source voltage (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v dss -30 v drain to gate voltage, (r gs = 20k ?) ( note 1 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v dgr -30 v gate to source voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v gs 20 v continuous drain current (figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i d pulsed drain current (note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i dm 60 refer to peak current curve a single pulse avalanche rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .e as figure 6 maximum power dissipation (figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .p d derate above 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176 1.17 w w/ o c operating and storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t j , t stg -55 to 175 o c maximum temperature for soldering leads at 0.063in (1.6mm) from case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l package body for 10s, see techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t pkg 300 260 o c o c caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. note: 1. t j = 25 o c to 150 o c. electrical speci?ations t c = 25 o c, unless otherwise speci?d parameter symbol test conditions min typ max units drain to source breakdown voltage bv dss i d = 250 a, v gs = 0v (figure 11) -30 - - v gate threshold voltage v gs(th) v gs = v ds , i d = 250 a (figure 10) -2 - -4 v zero gate voltage drain current i dss v ds = rated bv dss , v gs = 0v - - -1 a v ds = 0.8 x rated bv dss , t c = 150 o c - - -50 a gate to source leakage current i gss v gs = 20v - - 100 na drain to source on resistance (note 2) r ds(on) i d = 60a, v gs = 10v - - 0.027 ? turn-on time t on v dd = 15v, i d 60a, r l = 0.25 ? , v gs = -10v, r g = 2.5 ?, (figure 13) - - 140 ns turn-on delay time t d(on) -20-ns rise time t r -75-ns turn-off delay time t d(off) -35-ns fall time t f -40-ns turn-off time t off - - 115 ns total gate charge q g(tot) v gs = 0 to -20v v dd = -24v, i d 60a, r l = 0.4 ? i g(ref) = -3ma - 190 230 nc gate charge at 10v q g(-10) v gs = 0 to -10v - 100 120 nc threshold gate charge q g(th) v gs = 0 to -2v - 7.5 9 nc input capacitance c iss v ds = 25v, v gs = 0v, f = 1mhz (figure 12) - 3000 - pf output capacitance c oss - 1500 - pf reverse transfer capacitance c rss - 525 - pf thermal resistance, junction to case r jc (figure 3) - - 0.85 o c/w thermal resistance, junction to ambient r ja to-220ab, to- 263ab - - 62 o c/w to-247 - - 30 o c/w source to drain diode speci?ations parameter symbol test conditions min typ max units source to drain diode voltage (note 2) v sd i sd = -60a - - -1.75 v diode reverse recovery time t rr i sd = -60a, di sd /dt = 100a/ s - - 200 ns note: 2. pulse test: pulse width 300 s, duty cycle 2%. 3. repetitive rating: pulse width limited by maximum junction temperature. see transient thermal impedance curve (figure 3) rfg60p03, rfp60p03, RF1S60P03SM
?002 fairchild semiconductor corporation rfg60p03, rfp60p03, RF1S60P03SM rev. b typical performance curves unless otherwise speci?d figure 1. normalized power dissipation vs case temperature figure 2. maximum continuous drain current vs case temperature figure 3. normalized maximum transient thermal impedance figure 4. forward bias safe operating area figure 5. peak current capability 1.2 1.0 0.8 0.6 0.4 0.2 0 0 25 50 75 100 125 150 175 power dissipation multiplier t c , case temperature ( o c) -50 -40 -30 -20 -10 0 25 50 75 100 125 150 175 i d , drain current (a) t c , case temperature ( o c) -60 -70 p dm t 1 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z jc x r jc + t c t 2 1 0.1 0.01 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t , rectangular pulse duration (s) z jc, normalized single pulse 0.01 0.02 0.05 0.1 0.2 0.5 thermal impedance -500 -100 -10 -1 -1 -10 -60 v ds , drain to source voltage (v) 1ms 100 s 10ms 100ms dc i d , drain current (a) operation in this area may be limited by r ds(on) t c = 25 o c t j = max rated 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 -10 2 -10 3 t , pulse width (ms) i dm , peak current (a) v gs = -20v v gs = -10v transconductance may limit current in this region for temperatures above 25 o c derate peak current capability as follows: ii 25 175 t c 150 ----------------------- - ?? ?? ?? = -50 t c = 25 o c rfg60p03, rfp60p03, RF1S60P03SM
?002 fairchild semiconductor corporation rfg60p03, rfp60p03, RF1S60P03SM rev. b note: refer to fairchild application notes an9321 and an9322. figure 6. unclamped inductive switching figure 7. saturation characteristics figure 8. transfer characteristics figure 9. normalized drain to source on resistance vs junction temperature figure 10. normalized gate threshold voltage vs junction temperature figure 11. normalized drain to source breakdown voltage vs junction temperature typical performance curves unless otherwise speci?d (continued) -200 -100 -10 0.01 0.1 1 10 t av , time in avalanche (ms) i as , avalanche current (a) starting t j = 150 o c starting t j = 25 o c if r = 0 t av = (l) (i as ) / (1.3rated bv dss - v dd ) t av = (l/r) ln [(i as *r) / (1.3 rated bv dss - v dd ) + 1] if r 0 0 0 -1.5 -3.0 -4.5 -6.0 -7.5 i d , drain current (a) v ds , drain to source voltage (v) v gs = -5v v gs = -6v v gs = -8v v gs = -7v v gs = -10v -30 -60 -90 -120 v gs = -4.5v v gs = -20v pulse duration = 80 s t c = 25 o c duty cycle = 0.5% max 0 -2 -4 -6 -8 -10 v gs , gate to source voltage (v) i ds(on) , drain to source current (a) 0 pulse duration = 80 s duty cycle = 0.5% max -55 o c 175 o c 25 o c -30 -60 -120 -90 v dd = -15v 2 1.5 1 0.5 0 -80 -40 0 40 80 120 160 200 t j , junction temperature ( o c) normalized drain to source pulse duration = 80 s on resistance v gs = 1.5v, i d = 60a duty cycle = 0.5% max 2 1.5 1 0.5 0 -80 -40 0 40 80 160 120 200 threshold voltage t j , junction temperature ( o c) normalized gate v gs = v ds , i d = 250 a 2 1.5 1 0.5 0 -80 -40 0 40 80 120 160 200 normalized drain to source breakdown voltage t j , junction temperature ( o c) i d = 250 a rfg60p03, rfp60p03, RF1S60P03SM
?002 fairchild semiconductor corporation rfg60p03, rfp60p03, RF1S60P03SM rev. b figure 12. capacitance vs drain to source voltage note: refer to fairchild application notes an7254 and an7260. figure 13. normalized switching waveforms for constant gate current test circuits and waveforms figure 14. unclamped energy test circuit figure 15. unclamped energy waveform figure 16. switching time test circuit figure 17. resistive switching waveforms typical performance curves unless otherwise speci?d (continued) c iss c oss c rss 4000 3000 2000 1000 0 0 -5 -10 -15 -20 -25 c, capacitance (pf) v ds , drain to source voltage (v) 5000 v gs = 0v, f = 1mhz c iss = c gs + c gd c rss = c gd c oss c ds + c gs -30 -22.5 -15 -7.5 0 -10 -7.5 -5.0 -2.5 0 20 i g(ref) i g(act) 80 i g(ref) i g(act) t, time ( s) v dd = bv dss v dd = bv dss r l = 0.5 ? i g(ref) = -3ma 0.75 bv dss 0.50 bv dss 0.25 bv dss 0.75 bv dss 0.50 bv dss 0.25 bv dss v ds , drain to source voltage (v) v gs , gate to source voltage (v) v gs = -10v t p 0.01 ? l i as + - v ds v dd r g dut vary t p to obtain required peak i as 0v v gs v dd v ds bv dss t p i as t av 0 v gs r l r gs dut + - v dd v ds v gs t d(on) t r 90% 10% v ds 90% t f t d(off) t off 90% 50% 50% 10% pulse width v gs t on 10% 0 0 rfg60p03, rfp60p03, RF1S60P03SM
?002 fairchild semiconductor corporation rfg60p03, rfp60p03, RF1S60P03SM rev. b figure 18. gate charge test circuit figure 19. gate charge waveforms test circuits and waveforms (continued) r l v gs + - v ds v dd dut i g(ref) v dd q g(th) v gs = -2v q g(-10) v gs = -10v q g(tot) v gs = -20v v ds -v gs i g(ref) 0 0 rfg60p03, rfp60p03, RF1S60P03SM
?002 fairchild semiconductor corporation rfg60p03, rfp60p03, RF1S60P03SM rev. b pspice electrical model .subckt rfp60p03 2 1 3 rev 6/21/94 ca 12 8 5.01e-9 cb 15 14 3.9e-9 cin 6 8 3.09e-9 dbody 5 7 dbdmod dbreak 7 11 dbkmod dplcap 10 6 dplcapmod ebreak 5 11 17 18 -36.59 eds 14 8 5 8 1 egs 13 8 6 8 1 esg 5 10 8 6 1 evto 20 6 8 18 1 it 8 17 1 ldrain 2 5 1e-9 lgate 1 9 4.92e-9 lsource 3 7 2.36e-9 mos1 16 6 8 8 mosmod m=0.99 mos2 16 21 8 8 mosmod m=0.01 rbreak 17 18 rbkmod 1 rdrain 5 16 rdsmod 1e-4 rgate 9 20 3.25 rin 6 8 1e9 rsource 8 7 rdsmod 11.28e-3 rvto 18 19 rvtomod 1 s1a 6 12 13 8 s1amod s1b 13 12 13 8 s1bmod s2a 6 15 14 13 s2amod s2b 13 15 14 13 s2bmod vbat 8 19 dc 1 vto 21 6 -0.92 .model dbdmod d (is=4.21e-13 rs=1e-2 trs1=-2.69e-4 trs2=-1.33e-6 cjo=5.05e-9 tt=5.33e-8) .model dbkmod d (rs=3.80e-2 trs1=-4.76e-4 trs2=-4.17e-12) .model dplcapmod d (cjo=4.05e-9 is=1e-30 n=10) .model mosmod pmos (vto=-3.98 kp=16.27 is=1e-30 n=10 tox=1 l=1u w=1u) .model rbkmod res (tc1=8.05e-4 tc2=1.48e-6) .model rdsmod res (tc1=2.80e-3 tc2=2.62e-6) .model rvtomod res (tc1=-3.34e-3 tc2=1.46e-6) .model s1amod vswitch (ron=1e-5 roff=0.1 von=7.5 voff=4.5) .model s1bmod vswitch (ron=1e-5 roff=0.1 von=4.5 voff=7.5) .model s2amod vswitch (ron=1e-5 roff=0.1 von=1.43 voff=-3.57) .model s2bmod vswitch (ron=1e-5 roff=0.1 von=-3.57 voff=1.43) .ends note: for further discussion of the pspice model consult a new pspice sub-circuit for the power mosfet featuring global temperature options ; authors, william j. hepp and c. frank wheatley. evto + 13 ca cb egs eds rin cin mos1 mos2 dbreak ebreak dbody ldrain drain rsource lsource source rbreak rvto vbat it vto dplcap 10 5 16 21 8 14 7 3 17 18 19 2 + + + rdrain s1a s2a s2b s1b 12 15 13 8 14 13 6 8 + - 5 8 - - 18 8 rgate gate lgate 20 9 1 esg + - 6 8 11 + - 17 18 6 rfg60p03, rfp60p03, RF1S60P03SM
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?


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